The Design and Verification of a Sorter Core
نویسندگان
چکیده
The design and veri cation of a high speed sorter core is presented. We present several techniques and tools used to verify the functionality of the sorter. The sorter is a periodic sorter based on recursive butter y networks. Having a design language that is well-suited to describing these networks has helped us to explore the design space far more e ectively than is possible using conventional hardware description languages.
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